Unlocking the Power of HDL Coder

Implementing algorithms on FPGA and ASIC hardware has traditionally required a large amount of effort, time and collaboration between algorithm and hardware engineers. Teams have to balance a fine line of iterative design to meet design specification, quantise floating point operations to fixed-point and write HDL Code. You can improve productivity and reduce errors by using an automated HDL code generation workflow and tools.

In this webinar will investigate the use of the HDL Coder app to:

• Seamlessly  convert either a MATLAB script or Simulink model into the desired HDL code
• Outline the workflow and best practices pertaining to HDL Coder
• Work through a live demo of the HDL Coder process

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About the Presenter

Daniela Ghersevich is an engineer at Opti-Num Solutions. She studied Electrical and Electronic Engineering at Stellenbosch University. Her interests lie within hardware development, power electronics and renewable energy.